Careers

Syniotic is a vibrant place for employees to learn and grow. Our open and transparent culture allows employees to be innovative and encourages new ideas. Internal trainings help continuous improvement. Technical discussions among employees help further to learn about other verticals.
Strong work ethics, individual respect, care and share are the key tenets on which Syniotic culture is built. Celebrating achievements, key employee milestones (birthdays, anniversaries etc) help employees bond with each other to be part of larger Syniotic Family.

Syniotic is looking out for bright individuals, both talented experienced and freshers into our team. Syniotic offers industry standard benefits such as paid leaves, medical insurance and salaries are commensurate with experience.
Please feel free to reach out even if you do not see a particular position matches below with a cover-letter explaining your strengths. Please contact careers@syniotic.com for job enquiries.

Job description

Education : BTech in ECE/Electrical is must. MTech VLSI is preferred
Location : Hyderabad
No. of positions : 4
Desired Skills:

  • Minimum 1+ year of experience
  • Should have block/SOC level netlist-gds2 experience.
  • Expertise in Floorplaning, Power planning, CTS.
  • Should be capable of handling block-level timing closure.
  • Good scripting skills (TCL/Perl/Shell).
  • Experience on low power implementation techniques is preferred.
  • Synopsys/Cadence tool experience is preferred.
  • Good communication skills.

*More experienced candidates would be considered for Lead role

Job description

Education : BTech in ECE/Electrical is must. MTech VLSI is preferred
Location : Hyderabad
No. of positions : 2
Desired Skills:

  • Minimum 3+ year of experience
  • Should be adept at block/SOC level PD challenges on latest technology nodes (7nm, 14nm, 28nm)
  • Expertise in Floorplaning, Power planning, CTS and P&R.
  • Should be capable of handling block-level and chip level timing closure.
  • Should have knowledge on all low power & signoff checks, like MVRC/CLP, LEC/Formality, QRC, DRC, LVS, IR, EM.
  • Expert scripting skills (TCL / Perl/ SHELL).
  • Experience on low power implementation techniques is expected.
  • Synopsys/Cadence tool experience is preferred.
  • Should be capable to lead a team of upto 3 junior engineers. Should be able to provide any training/guidance that team members need
  • Strong communication skills to work with other leads and managers.

Job description

Education : BTech in ECE/Electrical is must. MTech VLSI is preferred
Location : Hyderabad
No. of positions : 2
Desired Skills:

  • Minimum 1+ year of experience in RTL quality checks (Lint, CDC)
  • Should have worked on several full chip designs both flat and hierarchical designs
  • Strong knowledge in RTL to Netlist handoff to Physical design team
  • Experience in low power/multi voltage design and understanding of UPF is preferred
  • Should have knowledge on low power and other Quality checks, like MVRC/CLP, LEC/Formality
  • Knowledge on DFT and Synthesis is preferred
  • Synopsys/Cadence tool experience is preferred.
  • Good communication skills.

Job description

Education : BTech in ECE/Electrical is must. MTech VLSI is preferred
Location : Hyderabad
No. of positions : 2
Desired Skills:

  • Minimum 1+ year of experience in Synthesis and STA
  • Should have worked on several full chip designs both flat and hierarchical designs
  • Strong knowledge in RTL to Netlist handoff to Physical design team
  • Experience in low power/multi voltage design and understanding of UPF is preferred
  • Knowledge on Cadence based flows is preferred
  • Knowledge on DFT and Physical design is preferred
  • Synopsys/Cadence tool experience is preferred.
  • Good communication skills.

Job description

Education : BTech in ECE/Electrical is must. MTech VLSI is preferred
Location : Hyderabad
No. of positions : 5
Desired Skills:

  • 2 to 4 year of experience in Design and Verification
  • Planning the verification for complex digital systems.
  • Strong in Test bench infrastructure Development using #SV/UVM
  • Shall have experience with one of the high speed protocols like Ethernet/PCIE/USB
  • Expertise in #SoC verification
  • Processor Verification and Protocol (PCI, AXI, DDR, USB) Verification is preferred
  • Creating a constrained-random verification environment using System Verilog and UVM
  • Identifying and writing all types of coverage measures for stimulus and corner-cases
  • Debugging tests with design engineers to deliver functionally correct design blocks
  • Closing coverage measures to identify verification holes and to show progress towards tape-out
  • Good communication skills.

Please contact us at sales@syniotic.com for business enquiries